Universal Asynchronous Receiver Transmitter - ορισμός. Τι είναι το Universal Asynchronous Receiver Transmitter
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Τι (ποιος) είναι Universal Asynchronous Receiver Transmitter - ορισμός

COMPUTER HARDWARE DEVICE
UART; Serial uart; UART overrun; Uart; Universal asynchronous receiver transmitter; Serial Communication Interface; 16450; Serial Communication Controller; Universal asynchronous receiver/transmitter; 16C450; 16450 UART; 16450 (UART); NS16450; PC16450C; Serial communication interface; Motorola 6850
  • Example of a UART frame. In this diagram, one [[byte]] is sent, consisting of a start bit, followed by eight data bits (D0-7), and two stop bit, for a 11-bit UART frame. The number of data and formatting bits, the presence or absence of a parity bit, the form of parity (even or odd) and the transmission speed must be pre-agreed by the communicating parties. The "stop bit" is actually a "stop period"; the stop period of the transmitter may be arbitrarily long. It cannot be shorter than a specified amount, usually 1 to 2 bit times. The receiver requires a shorter stop period than the transmitter. At the end of each data frame, the receiver stops briefly to wait for the next start bit. It is this difference which keeps the transmitter and receiver synchronized.
BCLK = Base Clock
  • Block diagram for a UART

Universal Asynchronous Receiver/Transmitter         
<communications, hardware> (UART) An integrated circuit used for serial communications, containing a transmitter (parallel-to-serial converter) and a receiver (serial-to-parallel converter), each clocked separately. The parallel side of a UART is usually connected to the bus of a computer. When the computer writes a byte to the UART's transmit data register (TDR), the UART will start to transmit it on the serial line. The UART's status register contains a flag bit which the computer can read to see if the UART is ready to transmit another byte. Another status register bit says whether the UART has received a byte from the {serial line}, in which case the computer should read it from the receive data register (RDR). If another byte is received before the previous one is read, the UART will signal an "overrun" error via another status bit. The UART may be set up to interrupt the computer when data is received or when ready to transmit more data. The UART's serial connections usually go via separate {line driver} and line receiver integrated circuits which provide the power and voltages required to drive the serial line and give some protection against noise on the line. Data on the serial line is formatted by the UART according to the setting of the UART's control register. This may also determine the transmit and receive baud rates if the UART contains its own clock circuits or "baud rate generators". If incorrectly formated data is received the UART may signal a "framing error" or "parity error". Often the clock will run at 16 times the baud rate (bits per second) to allow the receiver to do centre sampling - i.e. to read each bit in the middle of its allotted time period. This makes the UART more tolerant to variations in the clock rate ("jitter") of the incoming data. An example of a late 1980s UART was the Intel 8450. In the 1990s, newer UARTs were developed with on-chip buffers. This allowed higher transmission speed without data loss and without requiring such frequent attention from the computer. For example, the Intel 16550 has a 16 byte FIFO. Variants include the 16C550, 16C650, 16C750, and 16C850. The term "Serial Communications Interface" (SCI) was first used at Motorola around 1975 to refer to their start-stop asyncronous serial interface device, which others were calling a UART. See also bit bang. [Is this the same as an ACIA?] (2003-07-13)
Universal asynchronous receiver-transmitter         
A universal asynchronous receiver-transmitter (UART ) is a computer hardware device for asynchronous serial communication in which the data format and transmission speeds are configurable. It sends data bits one by one, from the least significant to the most significant, framed by start and stop bits so that precise timing is handled by the communication channel.
Universal synchronous and asynchronous receiver-transmitter         
SERIAL INTERFACE DEVICE THAT CAN BE PROGRAMMED TO COMMUNICATE ASYNCHRONOUSLY OR SYNCHRONOUSLY
USART; Universal Synchronous/Asynchronous Receiver/Transmitter
A universal synchronous and asynchronous receiver-transmitter (USART, programmable communications interface or PCI) is a type of a serial interface device that can be programmed to communicate asynchronously or synchronously. See universal asynchronous receiver-transmitter (UART) for a discussion of the asynchronous capabilities of these devices.

Βικιπαίδεια

Universal asynchronous receiver-transmitter

A universal asynchronous receiver-transmitter (UART ) is a computer hardware device for asynchronous serial communication in which the data format and transmission speeds are configurable. It sends data bits one by one, from the least significant to the most significant, framed by start and stop bits so that precise timing is handled by the communication channel. The electric signaling levels are handled by a driver circuit external to the UART. Two common signal levels are RS-232, and RS-485. Early teletypewriters used current loops.

It was one of the earliest computer communication devices, used to attach teletypewriters for an operator console. It was also an early hardware system for the Internet.

A UART is usually an individual (or part of an) integrated circuit (IC) used for serial communications over a computer or peripheral device serial port. One or more UART peripherals are commonly integrated in microcontroller chips. Specialised UARTs are used for automobiles, smart cards and SIMs.

A related device, the universal synchronous and asynchronous receiver-transmitter (USART) also supports synchronous operation.